Open-B5: An Expansion for the R&S UPL Audio Analyzer

This article outlines the development of an expansion card for the R&S UPL Audio Analyzer. It is supposed to give this beast an option to listen in on what the analyzer receives.

NOTE: This is a hobby project featuring a prototype of an idea, not a finished product. Building and use are at your own risk!!!

General Information

I was offered an R&S UPL audio measurement system at a very attractive price because it came from a bankruptcy estate.

Due to its architecture—featuring extremely precise and low-distortion A/D and D/A converters, highly complex analog signal conditioning, hundreds of intelligent design decisions, high-quality components, and more—this machine represents an excellent addition to an audio hobbyist’s test equipment arsenal. Additionally, its capabilities for quick on-device analysis and chart output, flexible measurement configurations, device-level scripting, digital audio I/Os, and more enable many measurements that would otherwise require an entire arsenal of different instruments used in combination.

The only downside was the hefty price tag one had to pay when it was released for such a gem.

Even today, such instruments command exorbitant prices, or if they fail, you’re left with an absolute nasty loot box trying to fix them.

Fortunately, the UPL arrived in condition appropriate for its age, except that the integrated PC motherboard was indeed missing four electrolytic capacitors directly in the voltage regulator for the CPU core voltage! Despite this, the device still ran without issues. However, for an audio measurement instrument, its operating noise—which sounded like a broken hammer drill in a demolition site and originated from the CPU fan—was rather unworthy.

Both problems were promptly resolved; after all, usable CPU fans from current production can be purchased for a fair amount of money.

Then came what had to come: the machine was missing two full options to become truly universally capable.

Option B5, the monitoring output this project focuses on, and Option B1, the high-precision oscillator.

Second-hand markets yielded neither option, and past sales prices were astronomical. Fortunately, the came with service manual. Back then (tm), there seemed to be an ethos that if you spent so much money, you truly owned it and were even allowed to attempt repairs yourself—something that unfortunately has largely fallen victim to planned obsolescence today.

Anyway: there was a schematic, a parts layout, a component list, and even a component placement coordinate list.

So let’s get building, shall we? Except for the moon-prices for discontinued semiconductors, of which at least four were required by the design. And so the journey began…

During the project, I got in touch with Bjirre, a very active member of the diyAudio community. Without his help—including original PCBs for cross-testing, logic analyzer traces, and more—this project might have been abandoned on the scrapheap due to overwhelming frustration. Thank you once again for all the support!

Connecting a DAC to the Port

When examining the signal lines of the connector for the B5 option, it became apparent that the I²S data stream was constantly present on the connector during normal operation, i.e., in the lower frequency range of the analyzer.

To quickly get a “proof of concept,” an inexpensive module from the Arduino/ESP32 world was simply connected to the analyzer. The level conversion from 5V to 3.3V was realized using a primitive voltage divider and worked flawlessly.

Such rapid success encourages further exploration.

Tracing the Original Schematic

First, the original schematic was drawn up, the board outline was aligned, and then everything was drawn as “original” as possible with components roughly placed.

However, the audio D/A converter from Crystal Audio used was only available from shady Chinese dealers—a good opportunity to spend money on defective, relabeled chips that supposedly do something, or similar junk.

The audio volume control also presented challenges: 12-bit multiplying A/D converters were used here, which were only available at high prices from a few distributors.

Finding Replacement Components

The audio DAC was quickly identified: a PCM5101 from Texas Instruments had already proven compatible with the system and supports at least one alternative format (which the analyzer could theoretically select). The DSP likely won’t unnecessarily switch formats during operation.

The 12-bit multiplying DACs were more difficult. The original DAC8143 from Analog Devices cost around €25 per piece during research, and two were used (one for left, one for right).

The alternative LTC1590CS chosen instead conveniently includes two such 12-bit D/A converters with properly wired shift registers for €22 per piece. Half the price and less wiring effort.

The audio output IC TDA1013B from ST was intended for the speaker, but was only available as gray-market parts with questionable reliability. Instead, the TDA2003 was chosen, which is still available new from secondary-source manufacturers today for mere cents.

The headphone output stage contained two AD844s, costing around €20 each. Here too, cost was reduced by planning a TL082. Yes, at the expense of output impedance/power. Since the chip is socketed, an upgrade from the “el cheapo” is always possible.

Capacitor C42 was an add-on because the capacitive loading of the output filter caused the op-amp to oscillate. This stabilized the amplifier loop.

Shift Register Chain on Breadboards

Before embarking on such a path, one should understand how the machine works. At least, that was the plan, until a breadboard with 74HC165 and 74HC166 chips, along with a big mess of color-coded wires, was used for the first test prototype of the newly organized SPI bus.

Finalizing Schematic and Layout

First Prototypes

Up to this point, the project had progressed quickly within about one or two months given the circumstances.

The four-layer PCB arrived in a five-pack, including a screen-printing template. Assembly was mostly successful except for one IC mounted backwards—it was simply rotated 180° on the pads. Lead-free solder made rework difficult, but with leaded solder, this simple error was quickly fixed.

Bringup - Part 1: Testing with PiPico

Connecting a self-built PCB—even after repeatedly checking the input branch and power consumption—to a device worth as much as a used car was not an option. Initially, a small test circuit was built on a breadboard using a Raspberry Pi Pico and a few 74HCT14 level converters.

MicroPython enabled comfortable bringup, providing a powerful command-line interface directly in the hardware. No compiler, toolchain issues, wild pointers, or register jungles. Not suitable for production hardware, but perfect as an interactive debugging tool for commissioning.

Bringup - Part 2: Nothing Works on the UPL!

Unfortunately, the UPL wasn’t too thrilled with its new expansion. The expansion was not recognized. This troubleshooting became the time-consuming aspect of the project.

In total, countless evenings and other non-working professional hours over five months were invested to find the root cause.

Rabbit Hole 1: SPI Bus

First, the SPI chain and responses were examined using a logic analyzer.

The UPL appears to recognize the expansion via IC U3, initially setting the strobe as Pin 1 (/PL = Inverted Parallel Load) and then shifting it out via clock pulses.

It’s important to note that /PL continuously latches the values present at the inputs into the register while low. This will become important again shortly.

The signal /LD arrives from the UPL as B5RD, passes through XOR gate U5B, reaches the PCB, and is forwarded as READ to U3.

Comparing signals from the shift registers showed that the original expansion shifted out a different ID on the first clock burst. The self-developed version shifted out this first read ID value exactly one bit offset. However, after the first shift, another B5RD signal was sent by the UPL. This second dataset then matched the ID applied to the board.

Changing the idle level via a pull-up resistor R18 then brought the strobe to a zero level. While the board ID was correctly output, no change occurred in functionality—or the lack thereof.

Additionally, it was noted that the rising edges of READ and CLK arrived virtually simultaneously, making the behavior of the HC165 shift registers undefined according to the datasheet.

The next attempt, slightly delaying the CLK signal relative to the READ signal, did produce a correct board ID in the first burst. However, the UPL still failed to recognize it.

Attempts to adapt to Bjirre’s module ID 0xD2 were also made, but again, no improvement—the UPL still failed to recognize the expansion.

Thus, the decision was made to investigate the UPL software to understand exactly how recognition works.

Rabbit Hole 2: UPL Software

The next phase involved delving into the UPL software. Initially, the UPL-UI.EXE was opened in Ghidra. During code analysis, routines using the so-called SERPA chip in the UPL were found.

The goal was to read values from the SPI bus to determine if the UPL correctly understood the board ID.

However, it turned out that Ghidra had massive problems with the very special segmentation under classic x86 memory management. Call chains could unfortunately not be fully reconstructed, making it impossible to identify the actual module recognition logic.

Another “hybrid” attempt involved understanding the SERPA chip addressing in the schematic.

With all this information, at least a rough plan could be created on how to access the SPI.

Accordingly, a small program in QBASIC was written to attempt accessing the SERPA chip via i86-port I/O. Unfortunately, lacking context to complete or properly initialize this led to a relay switching but the SPI bus remaining silent.

In desperation, even an emulation was set up to improve the stubborn static analysis.

To become independent of page mappings, etc., a complete state of the register set and instructions was written for every CPU instruction. The resulting 2GB text file was analyzed using AWK. Only the recognition routines for the entire UPL hardware were discovered this way. Unfortunately, even the SERPA initialization could not be found.

Bringup - Part 3: A New Hope

All these experiences were not particularly encouraging; it seemed something prevented the UPL from recognizing the B5 expansion. In another desperate attempt to get the device working, the datasheets of the substituted chips were compared with the originals, especially regarding the SPI chain.

It was noticed that data clocked through the SPI chain no longer arrived at the output of the D/A converter for the volume control (U8).

A look at its datasheet revealed that the assumption of polarity during layout was unfortunately inverted.

The DAC_STROBE had to be pulled high throughout the entire bus cycle and only go low momentarily during data strobing. Otherwise, no bits would pass through the DAC and thus not be forwarded through the entire SPI chain.

As soon as the 2nd input pin of XOR gate U4C was pulled high, the UPL immediately recognized the expansion without issue.

Now only UN8 remained problematic; when inserted, it became extremely hot and consumed enormous amounts of current. Initially, a layout error was suspected, but a quick glance with the oscilloscope showed the output oscillating happily at several MHz.

The output network, which R&S apparently installed for both EMC and ESD safety reasons, was too capacitive for the poor jelly bean(ish) op-amp. The original op-amp from Analog Devices was designed as an output driver with ample phase margin for such heavy capacitive loads. A bandwidth limitation or phase correction in the form of a capacitor connected in parallel with the feedback resistor brought stability and low operating temperatures.

Revision A Updates

These changes must be made on Rev. A PCBs for reliable recognition and function within the UPL.

Pull for WREN

The signal WREN must be pulled to +5V via R18, not to GND as initially drawn.

Inverting the Strobe

Fortunately, the digital input buffer consists of XOR gates, making signal inversion very easy—it simply requires connecting Pin 9 of U4 to high, e.g., to R16. The signal is then inverted since everything XOR 1 is inverted.

Stabilizing the Amplifier

To prevent the UN8, used as a headphone amplifier, from oscillating, 330pF capacitors must be soldered in parallel to R61 and R68 respectively.

Outlook

Getting the expansion card operational was quite a journey. A service manual helped create the initial version. The now outrageously expensive components forced substitutions, which then became the reason for a long journey through the UPL landscape.

The schematics are already up to date in the repository; a new layout is not planned for now. Next, the new component must be installed into the UPL. The mechanical construction of the device is as complex and uncompromising as the electronics. Therefore, the design of a laser-cut sheet metal part is currently underway. Once everything is installed, the UPL adventure continues.

Source Code

The entire project is available as open-source hardware under the BSD license: https://codeberg.org/d2887/UPL-B5